Virtualization trends in commercial computing offer benefits for cost, reliability, and security, but pose a challenge for military operators who need to visualize lossless imagery in real time. 10 GbE technology enables a standard zero client solution for viewing pixel-perfect C4ISR sensor and graphics information with near zero interactive latency.
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FPGAs have become some of the most importantdrivers for developmentof leading edge semiconductor technology. The complexity ofprogrammabledevices, and their integration of diverse high-performance functions, provides excellent vehicles
for testing new processes. It’s no accident that Intel has selected
Achronix and Tabula, both makers of programmable devices, as the only
partners that have been granted access to their 22 nm 3D Tri-Gate
(FinFET) process. In February, Intel also announced an agreement with
Altera, which will enable the company to manufacture FPGAs using their
next-generation 14 nm Tri-Gate process.
In parallel with driving manufacturing,FPGA technology development must also include enhancements to design tools and flows. As vendors strive to make their devices moreSoC- and ASIC-like, they are also adopting standards and collaborating withEDA companies to integrate their tools more seamlessly. These collaborations are producing great benefits for designers, as FPGA design methodologies are leading the way in areas that the EDA industry has long been promising new capabilities, such as in Electronic System Level (ESL) synthesis, IP integration and re-use, and higher-level tools for software/hardware co-design.
FPGA design methodologies have long integrated EDA point tools, such as simulation and PCB design, into FPGA vendor’s design platforms. Now, vendors such asSynopsys, with their Synplicity tools, and Xilinx with Vivado, are collaborating to build more complete integrated top-to-bottom flows. To address the greater complexity of FPGAs that may now contain up to two million equivalent logic cells, Synopsys has added Hierarchical Project Management(HPM) to Synplicity. HPM supports distributed design teams and parallel development, enabling partitioning ofRTLand sharing of design debug tasks. Xilinx has adopted the industry-standardSynopsys Design Constraint(SDC) timing constraints (to replace Xilinx proprietary UDC) in a design flow that can be driven from standardVerilog HDL.
1.EASING IP INTEGRATION
2.INDUSTRY STANDARDS ENABLE HIGHER LEVELS OF ABSTRACTION
Many of today's embedded systems incorporate multiple analog sensors that make devices more intelligent, and provide users with an array of information resulting in improved efficiency or added convenience. The Analog Front End (AFE), allowing the connection of the sensor to the digital world of the MCU, is often an assumed "burden" in designing sensor interface circuits. However, the latest concept in a configurable AFE, integrated into a single package, is helping systems designers overcome sensor integration challenges associated with tuning and sensor drift, thereby reducing time to market. The following discussion examines how the versatility of such a technology allows the designer to tune and debug AFE characteristics on the fly, automate trimming and adjust for sensor drift, and add scalability to support multiple sensor types with a single platform.
The ubiquitous use of sensors in our smart devices – from cell phones to industrial equipment and even medical devices – has increased the need for more intelligent sensor technologies that are more versatile, lower overall costs, and require fewer resources to develop and maintain.
Most analog sensor systems comprise three key elements: the analog sensor that measures a specific form of energy, the micro controller (MCU) that processes the digital equivalent of the sensor’s signal, and between them is the Analog Front End (AFE) system (Figure 1). The AFE receives the sensor’s signal and converts/transforms it for the MCU to use, as in most cases the sensor output signals cannot be directly interfaced to an MCU.
Figure 1: The Analog Front End (AFE) converts and conditions analog sensor signals for use by the MCU.
The challenge associated with current AFE design approaches is the time-consuming trial-and-error tuning process, and the lack of flexibility and scalability to support multiple sensors from a single AFE. Moreover, many AFEs do not account for sensor drift or adjust for sensor trimming during production, which directly reduces the quality of the sensor. However, new fully configurable AFE technology is enabling designers to overcome these hurdles.
The importance of the AFE
The AFE itself performs multiple functions, depending on the application. One function of the AFE is to amplify signals that are too weak for the MCU to read. The AFE circuitry employs amplifiers to provide output voltages that are hundreds or up to thousands of times larger than the voltage provided by the sensor. This is typically done with op-amps that can vary widely in cost and power based on the required characteristics. Depending on the sensor characteristics, the AFE amplifier structure will vary. For example, if the sensor output is differential and low impedance, a simple differential input can be used. If, on the other hand, the sensor output is differential and high impedance, a more complicated instrumentation amplifier, with matching high-impedance inputs, may be needed.
Another function of the AFE is to filter unwanted frequency ranges from the sensor, for example, to satisfy the Nyquist limit or to remove a DC offset. This noise must be removed before the analog signal is converted to digital. The AFE must employ low-pass filter circuitry to block out high-frequency noise and/or employ high-pass circuits to remove lower-frequency noise.
A third function of the AFE is to convert signals from one signal type to another. For example, typical sensors output a voltage, but some output a current. The MCU ADC circuits do not accept current inputs, so such currents have to be converted to voltages before going to the MCU. This current-to-voltage conversion is performed by the AFE circuit, called a transimpedance (I/V) circuit, which also amplifies the resulting voltage to levels usable by the MCU.
Challenges to AFE designs
Most AFE circuits are custom designed to meet the electrical requirements of a particular system under development. Engineers must design the circuitry, select the appropriate ICs and passive components, then test and tune the resulting circuit and PCB layout. In many cases, this takes a trial-and-error method to calibrate the right analog circuit design. This iterative tuning process is time and resource consuming, adversely affecting development cost and time-to-market. In addition, the AFE is often difficult to simulate and must be adjusted because of specific component behavior, board layout, and nearby noise sources.
There is also limited or no scalability of the AFE circuitry to support multiple sensors, let alone multiple types of sensors (that is, different topologies). The AFE circuit is designed for one particular sensor, making it difficult to swap one sensor for another using the same AFE – even if they employ the same topology.
Finally, sensors need constant tuning either during production – adjusted for sensor trimming – or because they degrade over time and cannot easily be corrected after they are deployed in the field. Fixed-component AFE designs do not correct for sensor drift nor are they easily adjusted for sensor trimming. A software-supported design approach can help.
Let’s examine each of these challenges.
Configurable AFE eases calibration trial and error
Looking at the hundreds of different types of sensors available, one can observe common topologies and signal characteristic ranges and understand that having the ability to simply change the characteristics of the op-amps, or to dynamically change the gain values, will significantly reduce the complexity and reduce development time.
The Renesas Smart Analog technology is an example of a fully configurable AFE technology that allows for such capability. As Figure 2 shows, such technology includes five elements: three separate configurable amplifiers, an additional amplifier with sync detection capability, a general-purpose op-amp, a low-pass filter with variable cutoff frequency, and lastly, a high-pass filter with variable cutoff frequency.
Figure 2: Diagram of a fully configurable AFE with an optional integrated MCU
The design engineer can create the desired custom AFE circuitry by simply setting the main parameters for these various circuit blocks, and then selecting the connections between these blocks. Three highly configurable amplifiers can be used to produce a tailored I/V transimpedance converter/amplifier, a noninverting amplifier, an inverting amplifier, a differential amplifier, or a summing amplifier. The chip can be custom configured to implement a range of signal amplification gains, and it provides an adjustable span of signal voltage offsets.
Additionally, the amplifiers in this IC can be configured to implement a single-channel, high-impedance instrumentation amplifier. This type of differential amplifier is essential for interfacing to high-impedance sensors such as piezoelectric types.
As the AFE takes care of amplifying/filtering/converting the signals from the sensor, the MCU (internal or external device) can analyze the AFE signals to dynamically change the gain values (that is, while the system is operating) to compensate for changes in ambient environment. This “closed loop,” self-adjusting AFE structure provides a more robust, intelligent sensor interface.
An integrated AFE+MCU device offers the additional benefit of automating the trimming process as it will read the signals from the AFE and compare that to the known parameters to make the necessary adjustments on the AFE, thereby cutting system production costs. In the same way, the MCU can automatically adjust the AFE gain to counteract the signal-generation deviations expected to occur over time as the sensor degrades.
Configurable AFE provides scalability
While configurability is important to reduce complexity and debugging time, another key design factor is scalability. An AFE with enough connection terminals to accommodate all the sensors typically needed eliminates the traditional requirement to have a separate AFE circuit for each sensor. Handling the entire array of sensors via one AFE helps shrink the circuit board and simultaneously decreases system component counts while reducing power consumption by as much as 20 percent. In fact, because of the simple interface of these AFEs – to just an SPI line and the ADC channels from the MCU – it is possible to connect to as many as 96 sensors using one MCU.
A software-supported design approach
Extreme configurability can come with the burden of tool complexity, so it is important to have a simple software-based design tool that can configure and customize the characteristics of the AFE for that specific application. Designers no longer need to understand the lowest level of the hardware, nor be analog experts when the AFE register values can be simply set, and the topology, gain/offset values, and characteristics can all be done in software.
Such a tool should run on a PC and provide an easy way for selecting typical sensor types, such as pressure, humidity, acceleration, impact, magnetic, and piezoelectric types – supporting multiple topologies and characteristics. The Smart Analog software provides this highly intuitive environment where designers easily set parameters, change topologies, do offset tuning, and have the ability to add filters and, of course, have access to the signal pins.
Because the tool itself already has libraries of different sensor profiles, it is easy for a systems engineer to have a starting point in their design. A graphical representation of the output signals from the AFE can be used to monitor systems with close-to-real-time feedback, which will make it very easy to make the AFE adjustments and tuning. All these features reduce complexity in development and thus reduce resource costs.
Once the configuration is set, the tool outputs a register file that can be used by the software on the MCU. The MCU stores the sensor settings in on-chip flash (nonvolatile) memory within its firmware, and when power is applied to the system, the MCU sends the stored settings to registers in the Smart Analog IC, reconfiguring that chip accordingly.
Simplifying the burden of AFE designs
The AFE is a critical, yet sometimes underappreciated component to a sensor system. The typical discrete approach of adding op-amps and filters, and trial-and-error soldering of resistors is not efficient and the cost of time in debugging and development easily outweighs the cost of adding an intelligent, MCU-based configurable AFE. But not all configurable AFEs are built the same. So, it is important to consider the flexibility and scalability of the AFE to support different types of sensors, and the intelligence to adjust “on the fly” or in the field. Simple, easy-to-use software tools can ease this process and can be used by even the non-analog experts on the team.
The speed of innovation in automotive IVI is making a lot of heads turn. No question, Linux OS and Android are the engines for change.
The open source software movement has forever transformed the mobiledevicelandscape. Consumers are able to do things today that 10 years ago were unimaginable. Just when smartphone and tablet users are comfortable using their devices in their daily lives, another industry is about to be transformed. The technology enabled by open source in this industry might be even more impressive than what we’ve just experienced in the smartphone industry.
The industry isautomotive, and already open source software has made significant inroads in how both driver and passenger interact within theautomobile. Open source stalwartsLinuxand Google are making significant contributions not only in the user/driver experience, but also insafety-criticaloperations,vehicle-to-vehicle communications, and automobile-to-cloudinteractions.
AMB-D255T1 features powerful graphic performance via VGA and HDMI
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Kwok Wu has many years of experience in advanced embedded systems and software...
ECD:What emerging trends and challenges do you see in embedded design?
WU:Internet traffic will grow 5x its size in the next three years (according to Morgan Stanley), driven bywirelessand video traffic as well as by the Internet of Things, which is connecting an increasing number of sensors and smart appliances with on-demand access via multiple smart handsets. Local wireless routers and access points thus need to become smart gateways, enabled by open-source scalable network platforms, in order to efficiently handle local traffic in homes, offices, and factories.
The #1 theme is a focus on smart residential gateways with the Internet of Things – usually forhome automationand remote monitoring to control sensors including smoke alarms, smart meters, smart appliances forsmart energy, and IP cameras forsecurity. For example, Freescale’s MPC8308nSG smart converged gateway with integrated wireless connectivity including 3G broadband, 802.11nWi-Fi, andZigBeewireless sensor networkaddresses many market opportunities in the smart energy/smart grid, health monitoring, industrial and residential automation, and mobiletransportationsegments.
The #2 theme is a focus on smart business gateways that deliver variouscloudservices for multi-user collaboration and office-in-a-box, such as unified communications, PBX VoIP, wireless video-on-demand, network video recording, and video surveillance. Office automation is another growth area offering businesses cloud-based services across a large number of users, sometimes in different offices.
ECD:Which engineering specialties are most valuable to your company, and are they difficult to find?
WU:Freescale Semiconductor is a leader in network and communication processors (Power Architecture), ZigBee RF sensor devices, i.MX multimedia application processors, and MCUs forautomobile, transportation, and industrial applications. Freescale’s Power Architecture networking processors offer efficient and scalable performance withsecuretrusted architecture.PowerPCprocessors are also used in the automobile enginemanagementandindustrial automationmarkets.
ECD:What is your assessment of the demand for ubiquitous connectivity, and how does it affect your product development plans?
WU:Converged network standards allow more devices to be connected seamlessly. Our product development must be on an open, scalable platform that can adapt to evolving connectivity standards. Our smart converged gateways need to handle multiple wireless technologies (3G, Wi-Fi,ZigBee wirelesssensor) all in one gateway.
ECD:How will embedded computing advance in the next 5-10 years?
WU:The “network is the computer” concept promises to deliver cloud-based services through the “network as a service”model. Open-source smart software will provide embedded distributed intelligence that enablessmartphones/tablets, smart appliances, smart TVs, smart utility meters, and IP-basedprogrammablecommunicating thermostats. These smart devices will offer on-demand Internet access through smart AP gateways and smart managed switches and routers, driven by open-source software-defined networks and platforms such as the Freescale smart gateways that won two international networking and communication awards. The key approach is to use an open-source, scalable, portable software platform for networking and communication, such as a software-defined network consisting of OpenFlow, OpenStack, and Open vSwitch.
Furthermore, smart gateways within a campus will be connected by a mesh network to form smart, resilient networks for local clouds. Smart software added to smart sensors and gateways with real-time location and context-aware decision-making will be more pervasive. These gateways will ultimately create safer, greener, more secure, and smarter connected communities (homes,cars, offices, factories) and a rich, personalized connected experience.
Many of today's embedded systems incorporate multiple analog sensors that make devices more intelligent, and provide users with an array of information resulting in improved efficiency or added convenience. The Analog Front End (AFE), allowing the connection of the sensor to the digital world of the MCU, is often an assumed "burden" in designing sensor interface circuits. However, the latest concept in a configurable AFE, integrated into a single package, is helping systems designers overcome sensor integration challenges associated with tuning and sensor drift, thereby reducing time to market. The following discussion examines how the versatility of such a technology allows the designer to tune and debug AFE characteristics on the fly, automate trimming and adjust for sensor drift, and add scalability to support multiple sensor types with a single platform.
